59 lines
1.6 KiB
Diff
59 lines
1.6 KiB
Diff
2014-07-17 Richard Biener <rguenther@suse.de>
|
|
|
|
PR rtl-optimization/61801
|
|
* sched-deps.c (sched_analyze_2): For ASM_OPERANDS and
|
|
ASM_INPUT don't set reg_pending_barrier if it appears in a
|
|
debug-insn.
|
|
|
|
2014-08-06 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
PR rtl-optimization/61801
|
|
* gcc.target/i386/pr61801.c: Rewritten.
|
|
|
|
2014-07-28 Richard Biener <rguenther@suse.de>
|
|
|
|
PR rtl-optimization/61801
|
|
* gcc.target/i386/pr61801.c: Fix testcase.
|
|
|
|
2014-07-28 Richard Biener <rguenther@suse.de>
|
|
|
|
PR rtl-optimization/61801
|
|
* gcc.target/i386/pr61801.c: New testcase.
|
|
|
|
--- gcc/sched-deps.c (revision 212737)
|
|
+++ gcc/sched-deps.c (revision 212738)
|
|
@@ -2750,7 +2750,8 @@ sched_analyze_2 (struct deps_desc *deps,
|
|
Consider for instance a volatile asm that changes the fpu rounding
|
|
mode. An insn should not be moved across this even if it only uses
|
|
pseudo-regs because it might give an incorrectly rounded result. */
|
|
- if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
|
|
+ if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x))
|
|
+ && !DEBUG_INSN_P (insn))
|
|
reg_pending_barrier = TRUE_BARRIER;
|
|
|
|
/* For all ASM_OPERANDS, we must traverse the vector of input operands.
|
|
--- gcc/testsuite/gcc.target/i386/pr61801.c (revision 0)
|
|
+++ gcc/testsuite/gcc.target/i386/pr61801.c (revision 213654)
|
|
@@ -0,0 +1,21 @@
|
|
+/* PR rtl-optimization/61801 */
|
|
+/* { dg-do compile } */
|
|
+/* { dg-options "-Os -fcompare-debug" } */
|
|
+
|
|
+int a, c;
|
|
+int bar (void);
|
|
+void baz (void);
|
|
+
|
|
+void
|
|
+foo (void)
|
|
+{
|
|
+ int d;
|
|
+ if (bar ())
|
|
+ {
|
|
+ int e;
|
|
+ baz ();
|
|
+ asm volatile ("" : "=a" (e) : "0" (a), "i" (0));
|
|
+ d = e;
|
|
+ }
|
|
+ c = d;
|
|
+}
|
